[FFmpeg-cvslog] Fix libpostproc compilation with !HAVE_6REGS.

Carl Eugen Hoyos git at videolan.org
Fri Apr 25 02:12:50 CEST 2014


ffmpeg | branch: master | Carl Eugen Hoyos <cehoyos at ag.or.at> | Thu Apr 24 17:50:02 2014 +0200| [a19bcf4ee8d9a9e740e4e3e7b1335b957641d428] | committer: Carl Eugen Hoyos

Fix libpostproc compilation with !HAVE_6REGS.

> http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commit;h=a19bcf4ee8d9a9e740e4e3e7b1335b957641d428
---

 libpostproc/postprocess_template.c |   30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/libpostproc/postprocess_template.c b/libpostproc/postprocess_template.c
index 3991ae9..0761c50 100644
--- a/libpostproc/postprocess_template.c
+++ b/libpostproc/postprocess_template.c
@@ -1668,7 +1668,7 @@ DEINT_FF((%%REGd, %1), (%%REGd, %1, 2), (%0, %1, 8) , (%%REGd, %1, 4))
  */
 static inline void RENAME(deInterlaceL5)(uint8_t src[], int stride, uint8_t *tmp, uint8_t *tmp2)
 {
-#if TEMPLATE_PP_MMXEXT || TEMPLATE_PP_3DNOW
+#if (TEMPLATE_PP_MMXEXT || TEMPLATE_PP_3DNOW) && HAVE_6REGS
     src+= stride*4;
     __asm__ volatile(
         "lea (%0, %1), %%"REG_a"                \n\t"
@@ -1728,7 +1728,7 @@ DEINT_L5(%%mm1, %%mm0, (%%REGd, %1, 2), (%0, %1, 8)    , (%%REGd, %1, 4))
         : : "r" (src), "r" ((x86_reg)stride), "r"(tmp), "r"(tmp2)
         : "%"REG_a, "%"REG_d
     );
-#else //TEMPLATE_PP_MMXEXT || TEMPLATE_PP_3DNOW
+#else //(TEMPLATE_PP_MMXEXT || TEMPLATE_PP_3DNOW) && HAVE_6REGS
     int x;
     src+= stride*4;
     for(x=0; x<8; x++){
@@ -1757,7 +1757,7 @@ DEINT_L5(%%mm1, %%mm0, (%%REGd, %1, 2), (%0, %1, 8)    , (%%REGd, %1, 4))
 
         src++;
     }
-#endif //TEMPLATE_PP_MMXEXT || TEMPLATE_PP_3DNOW
+#endif //(TEMPLATE_PP_MMXEXT || TEMPLATE_PP_3DNOW) && HAVE_6REGS
 }
 
 /**
@@ -2164,7 +2164,7 @@ static inline void RENAME(tempNoiseReducer)(uint8_t *src, int stride,
 
 #define FAST_L2_DIFF
 //#define L1_DIFF //u should change the thresholds too if u try that one
-#if TEMPLATE_PP_MMXEXT || TEMPLATE_PP_3DNOW
+#if (TEMPLATE_PP_MMXEXT || TEMPLATE_PP_3DNOW) && HAVE_6REGS
     __asm__ volatile(
         "lea (%2, %2, 2), %%"REG_a"             \n\t" // 3*stride
         "lea (%2, %2, 4), %%"REG_d"             \n\t" // 5*stride
@@ -2453,7 +2453,7 @@ L2_DIFF_CORE((%0, %%REGc)  , (%1, %%REGc))
           NAMED_CONSTRAINTS_ADD(b80)
         : "%"REG_a, "%"REG_d, "%"REG_c, "memory"
     );
-#else //TEMPLATE_PP_MMXEXT || TEMPLATE_PP_3DNOW
+#else //(TEMPLATE_PP_MMXEXT || TEMPLATE_PP_3DNOW) && HAVE_6REGS
 {
     int y;
     int d=0;
@@ -2536,7 +2536,7 @@ Switch between
         }
     }
 }
-#endif //TEMPLATE_PP_MMXEXT || TEMPLATE_PP_3DNOW
+#endif //(TEMPLATE_PP_MMXEXT || TEMPLATE_PP_3DNOW) && HAVE_6REGS
 }
 #endif //TEMPLATE_PP_ALTIVEC
 
@@ -3093,11 +3093,11 @@ static void RENAME(postProcess)(const uint8_t src[], int srcStride, uint8_t dst[
 static inline void RENAME(blockCopy)(uint8_t dst[], int dstStride, const uint8_t src[], int srcStride,
                                      int levelFix, int64_t *packedOffsetAndScale)
 {
-#if !TEMPLATE_PP_MMX
+#if !TEMPLATE_PP_MMX || !HAVE_6REGS
     int i;
 #endif
     if(levelFix){
-#if TEMPLATE_PP_MMX
+#if TEMPLATE_PP_MMX && HAVE_6REGS
     __asm__ volatile(
         "movq (%%"REG_a"), %%mm2        \n\t" // packedYOffset
         "movq 8(%%"REG_a"), %%mm3       \n\t" // packedYScale
@@ -3174,13 +3174,13 @@ SCALED_CPY((%%REGa, %4), (%%REGa, %4, 2), (%%REGd, %5), (%%REGd, %5, 2))
         "r" ((x86_reg)dstStride)
         : "%"REG_d
     );
-#else //TEMPLATE_PP_MMX
+#else //TEMPLATE_PP_MMX && HAVE_6REGS
     for(i=0; i<8; i++)
         memcpy( &(dst[dstStride*i]),
                 &(src[srcStride*i]), BLOCK_SIZE);
-#endif //TEMPLATE_PP_MMX
+#endif //TEMPLATE_PP_MMX && HAVE_6REGS
     }else{
-#if TEMPLATE_PP_MMX
+#if TEMPLATE_PP_MMX && HAVE_6REGS
     __asm__ volatile(
         "lea (%0,%2), %%"REG_a"                 \n\t"
         "lea (%1,%3), %%"REG_d"                 \n\t"
@@ -3207,11 +3207,11 @@ SIMPLE_CPY((%%REGa, %2), (%%REGa, %2, 2), (%%REGd, %3), (%%REGd, %3, 2))
         "r" ((x86_reg)dstStride)
         : "%"REG_a, "%"REG_d
     );
-#else //TEMPLATE_PP_MMX
+#else //TEMPLATE_PP_MMX && HAVE_6REGS
     for(i=0; i<8; i++)
         memcpy( &(dst[dstStride*i]),
                 &(src[srcStride*i]), BLOCK_SIZE);
-#endif //TEMPLATE_PP_MMX
+#endif //TEMPLATE_PP_MMX && HAVE_6REGS
     }
 }
 
@@ -3363,7 +3363,7 @@ static void RENAME(postProcess)(const uint8_t src[], int srcStride, uint8_t dst[
         // with the L1 Cache of the P4 ... or only a few blocks at a time or something
         for(x=0; x<width; x+=BLOCK_SIZE){
 
-#if TEMPLATE_PP_MMXEXT
+#if TEMPLATE_PP_MMXEXT && HAVE_6REGS
 /*
             prefetchnta(srcBlock + (((x>>2)&6) + 5)*srcStride + 32);
             prefetchnta(srcBlock + (((x>>2)&6) + 6)*srcStride + 32);
@@ -3499,7 +3499,7 @@ static void RENAME(postProcess)(const uint8_t src[], int srcStride, uint8_t dst[
 #endif
 
 
-#if TEMPLATE_PP_MMXEXT
+#if TEMPLATE_PP_MMXEXT && HAVE_6REGS
 /*
             prefetchnta(srcBlock + (((x>>2)&6) + 5)*srcStride + 32);
             prefetchnta(srcBlock + (((x>>2)&6) + 6)*srcStride + 32);



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