[FFmpeg-cvslog] configure: probe RISC-V Vector extension
Rémi Denis-Courmont
git at videolan.org
Tue Sep 27 14:58:52 EEST 2022
ffmpeg | branch: master | Rémi Denis-Courmont <remi at remlab.net> | Mon Sep 26 17:52:26 2022 +0300| [1b6aee52a5634976c6fd212a28175512eb7865f8] | committer: Lynne
configure: probe RISC-V Vector extension
> http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commit;h=1b6aee52a5634976c6fd212a28175512eb7865f8
---
Makefile | 2 +-
configure | 15 +++++++++++++++
ffbuild/arch.mak | 2 ++
3 files changed, 18 insertions(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index 61f79e27ae..1fb742f390 100644
--- a/Makefile
+++ b/Makefile
@@ -91,7 +91,7 @@ ffbuild/.config: $(CONFIGURABLE_COMPONENTS)
SUBDIR_VARS := CLEANFILES FFLIBS HOSTPROGS TESTPROGS TOOLS \
HEADERS ARCH_HEADERS BUILT_HEADERS SKIPHEADERS \
ARMV5TE-OBJS ARMV6-OBJS ARMV8-OBJS VFP-OBJS NEON-OBJS \
- ALTIVEC-OBJS VSX-OBJS MMX-OBJS X86ASM-OBJS \
+ ALTIVEC-OBJS VSX-OBJS RVV-OBJS MMX-OBJS X86ASM-OBJS \
MIPSFPU-OBJS MIPSDSPR2-OBJS MIPSDSP-OBJS MSA-OBJS \
MMI-OBJS LSX-OBJS LASX-OBJS OBJS SLIBOBJS SHLIBOBJS \
STLIBOBJS HOSTOBJS TESTOBJS
diff --git a/configure b/configure
index c157338b1f..a41ebda6d4 100755
--- a/configure
+++ b/configure
@@ -462,6 +462,7 @@ Optimization options (experts only):
--disable-mmi disable Loongson MMI optimizations
--disable-lsx disable Loongson LSX optimizations
--disable-lasx disable Loongson LASX optimizations
+ --disable-rvv disable RISC-V Vector optimizations
--disable-fast-unaligned consider unaligned accesses slow
Developer options (useful when working on FFmpeg itself):
@@ -2126,6 +2127,10 @@ ARCH_EXT_LIST_PPC="
vsx
"
+ARCH_EXT_LIST_RISCV="
+ rvv
+"
+
ARCH_EXT_LIST_X86="
$ARCH_EXT_LIST_X86_SIMD
cpunop
@@ -2135,6 +2140,7 @@ ARCH_EXT_LIST_X86="
ARCH_EXT_LIST="
$ARCH_EXT_LIST_ARM
$ARCH_EXT_LIST_PPC
+ $ARCH_EXT_LIST_RISCV
$ARCH_EXT_LIST_X86
$ARCH_EXT_LIST_MIPS
$ARCH_EXT_LIST_LOONGSON
@@ -2642,6 +2648,8 @@ ppc4xx_deps="ppc"
vsx_deps="altivec"
power8_deps="vsx"
+rvv_deps="riscv"
+
loongson2_deps="mips"
loongson3_deps="mips"
mmi_deps_any="loongson2 loongson3"
@@ -6110,6 +6118,10 @@ elif enabled ppc; then
check_cpp_condition power8 "altivec.h" "defined(_ARCH_PWR8)"
fi
+elif enabled riscv; then
+
+ enabled rvv && check_inline_asm rvv '".option arch, +v\nvsetivli zero, 0, e8, m1, ta, ma"'
+
elif enabled x86; then
check_builtin rdtsc intrin.h "__rdtsc()"
@@ -7596,6 +7608,9 @@ if enabled loongarch; then
echo "LSX enabled ${lsx-no}"
echo "LASX enabled ${lasx-no}"
fi
+if enabled riscv; then
+ echo "RISC-V Vector enabled ${rvv-no}"
+fi
echo "debug symbols ${debug-no}"
echo "strip symbols ${stripping-no}"
echo "optimize for size ${small-no}"
diff --git a/ffbuild/arch.mak b/ffbuild/arch.mak
index 997e31e85e..39d76ee152 100644
--- a/ffbuild/arch.mak
+++ b/ffbuild/arch.mak
@@ -15,5 +15,7 @@ OBJS-$(HAVE_LASX) += $(LASX-OBJS) $(LASX-OBJS-yes)
OBJS-$(HAVE_ALTIVEC) += $(ALTIVEC-OBJS) $(ALTIVEC-OBJS-yes)
OBJS-$(HAVE_VSX) += $(VSX-OBJS) $(VSX-OBJS-yes)
+OBJS-$(HAVE_RVV) += $(RVV-OBJS) $(RVV-OBJS-yes)
+
OBJS-$(HAVE_MMX) += $(MMX-OBJS) $(MMX-OBJS-yes)
OBJS-$(HAVE_X86ASM) += $(X86ASM-OBJS) $(X86ASM-OBJS-yes)
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