[FFmpeg-cvslog] lavc/aacpsdsp: unroll RISC-V V hybrid_analysis_ileave

Rémi Denis-Courmont git at videolan.org
Mon Oct 2 20:04:42 EEST 2023


ffmpeg | branch: master | Rémi Denis-Courmont <remi at remlab.net> | Thu Sep 28 18:28:43 2023 +0300| [0f1336b285541b8cb04f15f6caa5b4fc450a3f79] | committer: Rémi Denis-Courmont

lavc/aacpsdsp: unroll RISC-V V hybrid_analysis_ileave

> http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commit;h=0f1336b285541b8cb04f15f6caa5b4fc450a3f79
---

 libavcodec/riscv/aacpsdsp_rvv.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/libavcodec/riscv/aacpsdsp_rvv.S b/libavcodec/riscv/aacpsdsp_rvv.S
index f552d50e23..007002de70 100644
--- a/libavcodec/riscv/aacpsdsp_rvv.S
+++ b/libavcodec/riscv/aacpsdsp_rvv.S
@@ -168,10 +168,10 @@ func ff_ps_hybrid_analysis_ileave_rvv, zve32x /* no needs for zve32f here */
         mv          t4, a4
         addi        a2, a2, 1
 2:
-        vsetvli     t5, t3, e32, m1, ta, ma
+        vsetvli     t5, t3, e32, m4, ta, ma
         vlse32.v    v16, (t1), t6
         sub         t3, t3, t5
-        vlse32.v    v17, (t4), t6
+        vlse32.v    v20, (t4), t6
         mul         t2, t5, t6
         vsseg2e32.v v16, (t0)
         sh3add      t0, t5, t0



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