[FFmpeg-cvslog] lavc/vp8dsp: R-V V vp8_idct_dc_add4uv

sunyuechi git at videolan.org
Sat Feb 17 14:46:37 EET 2024


ffmpeg | branch: master | sunyuechi <sunyuechi at iscas.ac.cn> | Fri Feb  2 12:50:50 2024 +0800| [d897bbb48dcda23ca3d32332d5be4717dd66e551] | committer: Rémi Denis-Courmont

lavc/vp8dsp: R-V V vp8_idct_dc_add4uv

c908:
vp8_idct_dc_add4uv_c: 387.7
vp8_idct_dc_add4uv_rvv_i32: 134.5

Signed-off-by: Rémi Denis-Courmont <remi at remlab.net>

> http://git.videolan.org/gitweb.cgi/ffmpeg.git/?a=commit;h=d897bbb48dcda23ca3d32332d5be4717dd66e551
---

 libavcodec/riscv/vp8dsp_init.c |  4 ++++
 libavcodec/riscv/vp8dsp_rvv.S  | 13 +++++++++++++
 2 files changed, 17 insertions(+)

diff --git a/libavcodec/riscv/vp8dsp_init.c b/libavcodec/riscv/vp8dsp_init.c
index 6615d3d440..af57aabb71 100644
--- a/libavcodec/riscv/vp8dsp_init.c
+++ b/libavcodec/riscv/vp8dsp_init.c
@@ -27,6 +27,7 @@
 
 void ff_vp8_idct_dc_add_rvv(uint8_t *dst, int16_t block[16], ptrdiff_t stride);
 void ff_vp8_idct_dc_add4y_rvv(uint8_t *dst, int16_t block[4][16], ptrdiff_t stride);
+void ff_vp8_idct_dc_add4uv_rvv(uint8_t *dst, int16_t block[4][16], ptrdiff_t stride);
 
 av_cold void ff_vp8dsp_init_riscv(VP8DSPContext *c)
 {
@@ -36,6 +37,9 @@ av_cold void ff_vp8dsp_init_riscv(VP8DSPContext *c)
     if (flags & AV_CPU_FLAG_RVV_I32 && ff_get_rv_vlenb() >= 16) {
         c->vp8_idct_dc_add = ff_vp8_idct_dc_add_rvv;
         c->vp8_idct_dc_add4y = ff_vp8_idct_dc_add4y_rvv;
+        if (flags & AV_CPU_FLAG_RVB_ADDR) {
+            c->vp8_idct_dc_add4uv = ff_vp8_idct_dc_add4uv_rvv;
+        }
     }
 #endif
 }
diff --git a/libavcodec/riscv/vp8dsp_rvv.S b/libavcodec/riscv/vp8dsp_rvv.S
index a5a22188c1..8a0773f964 100644
--- a/libavcodec/riscv/vp8dsp_rvv.S
+++ b/libavcodec/riscv/vp8dsp_rvv.S
@@ -58,3 +58,16 @@ func ff_vp8_idct_dc_add4y_rvv, zve32x
 
         ret
 endfunc
+
+func ff_vp8_idct_dc_add4uv_rvv, zve32x
+        vsetivli      zero, 4, e8, mf4, ta, ma
+        vp8_idct_dc_addy
+        vp8_idct_dc_add
+        addi          a0, a0, -4
+        sh2add        a0, a2, a0
+        addi          a1, a1, 32
+        vp8_idct_dc_addy
+        vp8_idct_dc_add
+
+        ret
+endfunc



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