[Ffmpeg-devel] [RFC] svq1 very slow encoding

[Loren Merritt]

On Fri, 30 Mar 2007, Trent Piepho wrote:
> On Thu, 29 Mar 2007, Loren Merritt wrote:
>
> static int ssd_int8_vs_int16_mmx(int8_t *pix1, int16_t *pix2, int size){
> +    int sum;
> +    long i=size;
> +    asm volatile(
> ...
> +        "movd %%mm4, %1 \n"
> +        :"+r"(i), "=r"(sum)
> +        :"r"(pix1), "r"(pix2)
> +    );
> +    return sum;
>
> Shouldn't that be "+&r"(i)?

Maybe. I've never used earlyclobber, so if it is needed then there's a 
whole bunch of theoretically incorrect asm in lavc.

> On x86-64, could "int sum" be put in a 64-bit register?  Which would
> generate something like "movd %mm4, %rax".  Don't have a 64-bit system, but
> can you use movd with a 64-bit general purpose register?  If you can, isn't
> it still wrong, since %rax will have garbage in the top 32 bits?

int is 32bit, and the register name generated by a bare %1 is the 
same size as the value or variable it's associated with.
All 32bit ops zero out the high bits of the destination. And even if they 
didn't (e.g. if sum was 16bit), gcc will add any necessary extension.

--Loren Merritt