[FFmpeg-devel] [PATCH] ffvorbis, better L1 cache use and simplification of code

[Siarhei Siamashka]

Hi,

Interleaved forward/backward channels processing in order to increase chances
of stepping on already cached data for the cores with extremely small data
cache. Ensure that IMDCT per-rotation does not introduce cache write misses
(write misses on random memory accesses are bad for ARM cores with no
write-allocate cache as they prevent combining data in the write buffer).

ARM11 with 32K of L1 data cache (no L2) shows performance improvement in the
range 0.5-1% which is not so bad considering that IMDCT/IFFT and also many
other important dsputil functions are not assembly optimized for it yet.

According to cachegrind simulation, there might be also some improvement for
x86 cores with 16K of L1 data cache (decrease of the number of cache misses
is most visible in this configuration).

-- 
Best regards,
Siarhei Siamashka
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