[FFmpeg-devel] [PATCH] Backporting commits from head 1) commit hash 15ef98afd10b3696d29fb6d19606ba03a9dd47ad (configure: build fix for P5600 with mips code restructuring) 2) commit hash ad16eff64ba78d8dc98a8324640025c7cb2857f3 (mips: add support for R6)
shivraj.patil at imgtec.com
shivraj.patil at imgtec.com
Mon Apr 25 12:10:28 CEST 2016
From: Shivraj Patil <shivraj.patil at imgtec.com>
Signed-off-by: Shivraj Patil <shivraj.patil at imgtec.com>
---
configure | 252 ++++++++++++++----------------
libavcodec/mips/aaccoder_mips.c | 4 +
libavcodec/mips/aacdec_mips.h | 2 +
libavcodec/mips/aacpsdsp_mips.c | 4 +
libavcodec/mips/aacpsy_mips.h | 2 +
libavcodec/mips/aacsbr_mips.c | 4 +
libavcodec/mips/aacsbr_mips.h | 2 +
libavcodec/mips/ac3dsp_mips.c | 6 +-
libavcodec/mips/acelp_filters_mips.c | 4 +
libavcodec/mips/acelp_vectors_mips.c | 4 +
libavcodec/mips/amrwbdec_mips.c | 2 +
libavcodec/mips/amrwbdec_mips.h | 2 +
libavcodec/mips/celp_filters_mips.c | 4 +
libavcodec/mips/celp_math_mips.c | 4 +
libavcodec/mips/compute_antialias_float.h | 2 +
libavcodec/mips/fft_mips.c | 4 +
libavcodec/mips/iirfilter_mips.c | 4 +
libavcodec/mips/lsp_mips.h | 2 +
libavcodec/mips/mpegaudiodsp_mips_fixed.c | 10 ++
libavcodec/mips/mpegaudiodsp_mips_float.c | 10 ++
libavcodec/mips/sbrdsp_mips.c | 4 +
libavutil/mips/float_dsp_mips.c | 4 +
22 files changed, 203 insertions(+), 133 deletions(-)
diff --git a/configure b/configure
index 475c087..9103e85 100755
--- a/configure
+++ b/configure
@@ -913,6 +913,25 @@ void foo(void){ __asm__ volatile($code); }
EOF
}
+check_inline_asm_flags(){
+ log check_inline_asm_flags "$@"
+ name="$1"
+ code="$2"
+ flags=''
+ shift 2
+ while [ "$1" != "" ]; do
+ append flags $1
+ shift
+ done;
+ disable $name
+ cat > $TMPC <<EOF
+void foo(void){ __asm__ volatile($code); }
+EOF
+ log_file $TMPC
+ check_cmd $cc $CPPFLAGS $CFLAGS $flags "$@" $CC_C $(cc_o $TMPO) $TMPC &&
+ enable $name && add_cflags $flags && add_asflags $flags && add_ldflags $flags
+}
+
check_insn(){
log check_insn "$@"
check_inline_asm ${1}_inline "\"$2\""
@@ -1657,6 +1676,7 @@ ARCH_EXT_LIST_ARM="
ARCH_EXT_LIST_MIPS="
mipsfpu
mips32r2
+ mips32r5
mips64r2
mips32r6
mips64r6
@@ -2150,10 +2170,11 @@ mipsfpu_deps="mips"
mipsdsp_deps="mips"
mipsdspr2_deps="mips"
mips32r2_deps="mips"
+mips32r5_deps="mips"
mips32r6_deps="mips"
mips64r2_deps="mips"
mips64r6_deps="mips"
-msa_deps="mips"
+msa_deps="mipsfpu"
mmi_deps="mips"
altivec_deps="ppc"
@@ -4153,118 +4174,90 @@ elif enabled mips; then
cpuflags="-march=$cpu"
- case $cpu in
- 24kc)
- disable mips32r6
- disable mips64r2
- disable mips64r6
- disable mipsfpu
- disable mipsdsp
- disable mipsdspr2
- disable msa
- ;;
- 24kf*)
- disable mips32r6
- disable mips64r2
- disable mips64r6
- disable mipsdsp
- disable mipsdspr2
- disable msa
- ;;
- 24kec|34kc|1004kc)
- disable mips32r6
- disable mips64r2
- disable mips64r6
- disable mipsfpu
- disable mipsdspr2
- disable msa
- ;;
- 24kef*|34kf*|1004kf*)
- disable mips32r6
- disable mips64r2
- disable mips64r6
- disable mipsdspr2
- disable msa
- ;;
- 74kc)
- disable mips32r6
- disable mips64r2
- disable mips64r6
- disable mipsfpu
- disable msa
- ;;
- 74kf)
- disable mips32r6
- disable mips64r2
- disable mips64r6
- disable msa
- ;;
- p5600)
- disable mips32r6
- disable mips64r2
- disable mips64r6
- disable mipsdsp
- disable mipsdspr2
- check_cflags "-mtune=p5600" &&
- check_cflags "-mfp64 -msched-weight -mload-store-pairs -funroll-loops" &&
- add_asflags "-mfp64"
- ;;
- i6400)
- disable mips32r2
- disable mips32r6
- disable mips64r2
- disable mipsdsp
- disable mipsdspr2
- check_cflags "-mtune=i6400 -mabi=64" &&
- check_cflags "-mfp64 -msched-weight -mload-store-pairs -funroll-loops" &&
- check_ldflags "-mabi=64" &&
- add_asflags "-mfp64"
- ;;
- loongson*)
- disable mips32r2
- disable mips32r6
- disable mips64r2
- disable mips64r6
- disable mipsfpu
- disable mipsdsp
- disable mipsdspr2
- disable msa
- enable local_aligned_8 local_aligned_16 local_aligned_32
- enable simd_align_16
- enable fast_64bit
- enable fast_clz
- enable fast_cmov
- enable fast_unaligned
- disable aligned_stack
- case $cpu in
- loongson3*)
- cpuflags="-march=loongson3a -mhard-float -fno-expensive-optimizations"
- ;;
- loongson2e)
- cpuflags="-march=loongson2e -mhard-float -fno-expensive-optimizations"
- ;;
- loongson2f)
- cpuflags="-march=loongson2f -mhard-float -fno-expensive-optimizations"
- ;;
- esac
- ;;
- generic)
- disable mips64r6
- disable msa
- ;;
- *)
- # Unknown CPU. Disable everything.
- warn "unknown CPU. Disabling all MIPS optimizations."
- disable mipsfpu
- disable mips32r2
- disable mips32r6
- disable mips64r2
- disable mips64r6
- disable mipsdsp
- disable mipsdspr2
- disable msa
- ;;
- esac
+ if [ "$cpu" != "generic" ]; then
+ disable mips32r2
+ disable mips32r5
+ disable mips64r2
+ disable mips32r6
+ disable mips64r6
+ disable loongson2
+ disable loongson3
+
+ case $cpu in
+ 24kc|24kf*|24kec|34kc|1004kc|24kef*|34kf*|1004kf*|74kc|74kf)
+ enable mips32r2
+ disable msa
+ ;;
+ p5600|i6400)
+ disable mipsdsp
+ disable mipsdspr2
+ ;;
+ loongson*)
+ enable loongson2
+ enable loongson3
+ enable local_aligned_8 local_aligned_16 local_aligned_32
+ enable simd_align_16
+ enable fast_64bit
+ enable fast_clz
+ enable fast_cmov
+ enable fast_unaligned
+ disable aligned_stack
+ case $cpu in
+ loongson3*)
+ cpuflags="-march=loongson3a -mhard-float -fno-expensive-optimizations"
+ ;;
+ loongson2e)
+ cpuflags="-march=loongson2e -mhard-float -fno-expensive-optimizations"
+ ;;
+ loongson2f)
+ cpuflags="-march=loongson2f -mhard-float -fno-expensive-optimizations"
+ ;;
+ esac
+ ;;
+ *)
+ # Unknown CPU. Disable everything.
+ warn "unknown CPU. Disabling all MIPS optimizations."
+ disable mipsfpu
+ disable mipsdsp
+ disable mipsdspr2
+ disable msa
+ disable mmi
+ ;;
+ esac
+
+ case $cpu in
+ 24kc)
+ disable mipsfpu
+ disable mipsdsp
+ disable mipsdspr2
+ ;;
+ 24kf*)
+ disable mipsdsp
+ disable mipsdspr2
+ ;;
+ 24kec|34kc|1004kc)
+ disable mipsfpu
+ disable mipsdspr2
+ ;;
+ 24kef*|34kf*|1004kf*)
+ disable mipsdspr2
+ ;;
+ 74kc)
+ disable mipsfpu
+ ;;
+ p5600)
+ enable mips32r5
+ check_cflags "-mtune=p5600" && check_cflags "-msched-weight -mload-store-pairs -funroll-loops"
+ ;;
+ i6400)
+ enable mips64r6
+ check_cflags "-mtune=i6400 -mabi=64" && check_cflags "-msched-weight -mload-store-pairs -funroll-loops" && check_ldflags "-mabi=64"
+ ;;
+ esac
+ else
+ # We do not disable anything. Is up to the user to disable the unwanted features.
+ warn 'generic cpu selected'
+ fi
elif enabled ppc; then
@@ -5073,27 +5066,22 @@ elif enabled mips; then
enabled mmi && check_inline_asm mmi '"punpcklhw $f0, $f0, $f0"'
# Enable minimum ISA based on selected options
- if enabled mips64 && (enabled mipsdsp || enabled mipsdspr2); then
- add_cflags "-mips64r2"
- add_asflags "-mips64r2"
- elif enabled mips64 && enabled mipsfpu && disabled loongson2 && disabled loongson3; then
- add_cflags "-mips64"
- add_asflags "-mips64"
- elif enabled mipsdsp || enabled mipsdspr2; then
- add_cflags "-mips32r2 -mfp32"
- add_asflags "-mips32r2 -mfp32"
+ if enabled mips64; then
+ enabled mips64r6 && check_inline_asm_flags mips64r6 '"dlsa $0, $0, $0, 1"' '-mips64r6'
+ enabled mips64r2 && check_inline_asm_flags mips64r2 '"dext $0, $0, 0, 1"' '-mips64r2'
+ disabled mips64r6 && disabled mips64r2 && check_inline_asm_flags mips64r1 '"daddi $0, $0, 0"' '-mips64'
+ else
+ enabled mips32r6 && check_inline_asm_flags mips32r6 '"aui $0, $0, 0"' '-mips32r6'
+ enabled mips32r5 && check_inline_asm_flags mips32r5 '"eretnc"' '-mips32r5'
+ enabled mips32r2 && check_inline_asm_flags mips32r2 '"ext $0, $0, 0, 1"' '-mips32r2'
+ disabled mips32r6 && disabled mips32r5 && disabled mips32r2 && check_inline_asm_flags mips32r1 '"addi $0, $0, 0"' '-mips32'
fi
- enabled mipsdsp && add_cflags "-mdsp" && add_asflags "-mdsp" &&
- check_inline_asm mipsdsp '"addu.qb $t0, $t1, $t2"'
- enabled mipsdspr2 && add_cflags "-mdspr2" && add_asflags "-mdspr2" &&
- check_inline_asm mipsdspr2 '"absq_s.qb $t0, $t1"'
- enabled mipsfpu && add_cflags "-mhard-float" && add_asflags "-mhard-float" &&
- check_inline_asm mipsfpu '"madd.d $f0, $f2, $f4, $f6"'
- enabled msa && check_cflags "-mmsa" && check_ldflags "-mmsa" &&
- check_inline_asm msa '"addvi.b $w0, $w1, 1"'
-
- enabled msa && add_asflags "-mmsa"
+ enabled mipsfpu && check_inline_asm_flags mipsfpu '"cvt.d.l $f0, $f2"' '-mhard-float'
+ enabled mipsfpu && (enabled mips32r5 || enabled mips32r6 || enabled mips64r6) && check_inline_asm_flags mipsfpu '"cvt.d.l $f0, $f1"' '-mfp64'
+ enabled mipsfpu && enabled msa && check_inline_asm_flags msa '"addvi.b $w0, $w1, 1"' '-mmsa' && check_header msa.h || disable msa
+ enabled mipsdsp && check_inline_asm_flags mipsdsp '"addu.qb $t0, $t1, $t2"' '-mdsp'
+ enabled mipsdspr2 && check_inline_asm_flags mipsdspr2 '"absq_s.qb $t0, $t1"' '-mdspr2'
elif enabled parisc; then
diff --git a/libavcodec/mips/aaccoder_mips.c b/libavcodec/mips/aaccoder_mips.c
index 8fbdfd2..d690c8c 100644
--- a/libavcodec/mips/aaccoder_mips.c
+++ b/libavcodec/mips/aaccoder_mips.c
@@ -66,6 +66,7 @@
#include "libavcodec/aacenc_utils.h"
#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
typedef struct BandCodingPath {
int prev_idx;
float cost;
@@ -2477,10 +2478,12 @@ static void search_for_ms_mips(AACEncContext *s, ChannelElement *cpe)
#include "libavcodec/aaccoder_trellis.h"
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_INLINE_ASM */
void ff_aac_coder_init_mips(AACEncContext *c) {
#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
AACCoefficientsEncoder *e = c->coder;
int option = c->options.coder;
@@ -2494,5 +2497,6 @@ void ff_aac_coder_init_mips(AACEncContext *c) {
#if HAVE_MIPSFPU
e->search_for_ms = search_for_ms_mips;
#endif /* HAVE_MIPSFPU */
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_INLINE_ASM */
}
diff --git a/libavcodec/mips/aacdec_mips.h b/libavcodec/mips/aacdec_mips.h
index c4f6438..758266f 100644
--- a/libavcodec/mips/aacdec_mips.h
+++ b/libavcodec/mips/aacdec_mips.h
@@ -61,6 +61,7 @@
#include "libavutil/mips/asmdefs.h"
#if HAVE_INLINE_ASM && HAVE_MIPSFPU
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
static inline float *VMUL2_mips(float *dst, const float *v, unsigned idx,
const float *scale)
{
@@ -246,6 +247,7 @@ static inline float *VMUL4S_mips(float *dst, const float *v, unsigned idx,
#define VMUL4 VMUL4_mips
#define VMUL2S VMUL2S_mips
#define VMUL4S VMUL4S_mips
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_INLINE_ASM && HAVE_MIPSFPU */
#endif /* AVCODEC_MIPS_AACDEC_MIPS_H */
diff --git a/libavcodec/mips/aacpsdsp_mips.c b/libavcodec/mips/aacpsdsp_mips.c
index 695f9ef..83fdc2f 100644
--- a/libavcodec/mips/aacpsdsp_mips.c
+++ b/libavcodec/mips/aacpsdsp_mips.c
@@ -188,6 +188,7 @@ static void ps_hybrid_synthesis_deint_mips(float out[2][38][64],
}
#if HAVE_MIPSFPU
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
static void ps_add_squares_mips(float *dst, const float (*src)[2], int n)
{
int i;
@@ -442,6 +443,7 @@ static void ps_stereo_interpolate_mips(float (*l)[2], float (*r)[2],
: "memory"
);
}
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_MIPSFPU */
#endif /* HAVE_INLINE_ASM */
@@ -451,10 +453,12 @@ void ff_psdsp_init_mips(PSDSPContext *s)
s->hybrid_analysis_ileave = ps_hybrid_analysis_ileave_mips;
s->hybrid_synthesis_deint = ps_hybrid_synthesis_deint_mips;
#if HAVE_MIPSFPU
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
s->add_squares = ps_add_squares_mips;
s->mul_pair_single = ps_mul_pair_single_mips;
s->decorrelate = ps_decorrelate_mips;
s->stereo_interpolate[0] = ps_stereo_interpolate_mips;
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_MIPSFPU */
#endif /* HAVE_INLINE_ASM */
}
diff --git a/libavcodec/mips/aacpsy_mips.h b/libavcodec/mips/aacpsy_mips.h
index 42ff442..a1fe5cc 100644
--- a/libavcodec/mips/aacpsy_mips.h
+++ b/libavcodec/mips/aacpsy_mips.h
@@ -59,6 +59,7 @@
#include "libavutil/mips/asmdefs.h"
#if HAVE_INLINE_ASM && HAVE_MIPSFPU && ( PSY_LAME_FIR_LEN == 21 )
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
static void calc_thr_3gpp_mips(const FFPsyWindowInfo *wi, const int num_bands,
AacPsyChannel *pch, const uint8_t *band_sizes,
const float *coefs, const int cutoff)
@@ -232,5 +233,6 @@ static void psy_hp_filter_mips(const float *firbuf, float *hpfsmpl, const float
#define calc_thr_3gpp calc_thr_3gpp_mips
#define psy_hp_filter psy_hp_filter_mips
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_INLINE_ASM && HAVE_MIPSFPU */
#endif /* AVCODEC_MIPS_AACPSY_MIPS_H */
diff --git a/libavcodec/mips/aacsbr_mips.c b/libavcodec/mips/aacsbr_mips.c
index e478290..56aa4e8 100644
--- a/libavcodec/mips/aacsbr_mips.c
+++ b/libavcodec/mips/aacsbr_mips.c
@@ -311,6 +311,7 @@ static int sbr_x_gen_mips(SpectralBandReplication *sbr, float X[2][38][64],
}
#if HAVE_MIPSFPU
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
static void sbr_hf_assemble_mips(float Y1[38][64][2],
const float X_high[64][40][2],
SpectralBandReplication *sbr, SBRData *ch_data,
@@ -603,6 +604,7 @@ static void sbr_hf_inverse_filter_mips(SBRDSPContext *dsp,
}
}
}
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_MIPSFPU */
#endif /* HAVE_INLINE_ASM */
@@ -612,8 +614,10 @@ void ff_aacsbr_func_ptr_init_mips(AACSBRContext *c)
c->sbr_lf_gen = sbr_lf_gen_mips;
c->sbr_x_gen = sbr_x_gen_mips;
#if HAVE_MIPSFPU
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
c->sbr_hf_inverse_filter = sbr_hf_inverse_filter_mips;
c->sbr_hf_assemble = sbr_hf_assemble_mips;
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_MIPSFPU */
#endif /* HAVE_INLINE_ASM */
}
diff --git a/libavcodec/mips/aacsbr_mips.h b/libavcodec/mips/aacsbr_mips.h
index 13e55d2..4461e76 100644
--- a/libavcodec/mips/aacsbr_mips.h
+++ b/libavcodec/mips/aacsbr_mips.h
@@ -150,6 +150,7 @@ static void sbr_qmf_analysis_mips(AVFloatDSPContext *fdsp, FFTContext *mdct,
}
#if HAVE_MIPSFPU
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
static void sbr_qmf_synthesis_mips(FFTContext *mdct,
SBRDSPContext *sbrdsp, AVFloatDSPContext *fdsp,
float *out, float X[2][38][64],
@@ -488,6 +489,7 @@ static void sbr_qmf_synthesis_mips(FFTContext *mdct,
#define sbr_qmf_analysis sbr_qmf_analysis_mips
#define sbr_qmf_synthesis sbr_qmf_synthesis_mips
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_MIPSFPU */
#endif /* HAVE_INLINE_ASM */
diff --git a/libavcodec/mips/ac3dsp_mips.c b/libavcodec/mips/ac3dsp_mips.c
index da4919f..f9aaf15 100644
--- a/libavcodec/mips/ac3dsp_mips.c
+++ b/libavcodec/mips/ac3dsp_mips.c
@@ -201,6 +201,7 @@ static void ac3_update_bap_counts_mips(uint16_t mant_cnt[16], uint8_t *bap,
#endif
#if HAVE_MIPSFPU
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
static void float_to_fixed24_mips(int32_t *dst, const float *src, unsigned int len)
{
const float scale = 1 << 24;
@@ -395,7 +396,8 @@ static void ac3_downmix_mips(float **samples, float (*matrix)[2],
:"memory"
);
}
-#endif
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
+#endif /* HAVE_MIPSFPU */
#endif /* HAVE_INLINE_ASM */
void ff_ac3dsp_init_mips(AC3DSPContext *c, int bit_exact) {
@@ -405,9 +407,11 @@ void ff_ac3dsp_init_mips(AC3DSPContext *c, int bit_exact) {
c->update_bap_counts = ac3_update_bap_counts_mips;
#endif
#if HAVE_MIPSFPU
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
c->float_to_fixed24 = float_to_fixed24_mips;
c->downmix = ac3_downmix_mips;
#endif
#endif
+#endif
}
diff --git a/libavcodec/mips/acelp_filters_mips.c b/libavcodec/mips/acelp_filters_mips.c
index ba789ab..478db85 100644
--- a/libavcodec/mips/acelp_filters_mips.c
+++ b/libavcodec/mips/acelp_filters_mips.c
@@ -57,6 +57,7 @@
#include "libavutil/mips/asmdefs.h"
#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
static void ff_acelp_interpolatef_mips(float *out, const float *in,
const float *filter_coeffs, int precision,
int frac_pos, int filter_length, int length)
@@ -206,12 +207,15 @@ static void ff_acelp_apply_order_2_transfer_function_mips(float *out, const floa
"$f12", "$f13", "$f14", "$f15", "$f16", "memory"
);
}
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_INLINE_ASM */
void ff_acelp_filter_init_mips(ACELPFContext *c)
{
#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
c->acelp_interpolatef = ff_acelp_interpolatef_mips;
c->acelp_apply_order_2_transfer_function = ff_acelp_apply_order_2_transfer_function_mips;
#endif
+#endif
}
diff --git a/libavcodec/mips/acelp_vectors_mips.c b/libavcodec/mips/acelp_vectors_mips.c
index ad94348..0ab2b6a 100644
--- a/libavcodec/mips/acelp_vectors_mips.c
+++ b/libavcodec/mips/acelp_vectors_mips.c
@@ -57,6 +57,7 @@
#include "libavutil/mips/asmdefs.h"
#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
static void ff_weighted_vector_sumf_mips(
float *out, const float *in_a, const float *in_b,
float weight_coeff_a, float weight_coeff_b, int length)
@@ -92,11 +93,14 @@ static void ff_weighted_vector_sumf_mips(
: "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "memory"
);
}
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_INLINE_ASM */
void ff_acelp_vectors_init_mips(ACELPVContext *c)
{
#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
c->weighted_vector_sumf = ff_weighted_vector_sumf_mips;
#endif
+#endif
}
diff --git a/libavcodec/mips/amrwbdec_mips.c b/libavcodec/mips/amrwbdec_mips.c
index e933b8a..5dc0543 100644
--- a/libavcodec/mips/amrwbdec_mips.c
+++ b/libavcodec/mips/amrwbdec_mips.c
@@ -54,6 +54,7 @@
#include "amrwbdec_mips.h"
#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
void ff_hb_fir_filter_mips(float *out, const float fir_coef[HB_FIR_SIZE + 1],
float mem[HB_FIR_SIZE], const float *in)
{
@@ -184,4 +185,5 @@ void ff_hb_fir_filter_mips(float *out, const float fir_coef[HB_FIR_SIZE + 1],
}
memcpy(mem, data + AMRWB_SFR_SIZE_16k, HB_FIR_SIZE * sizeof(float));
}
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_INLINE_ASM */
diff --git a/libavcodec/mips/amrwbdec_mips.h b/libavcodec/mips/amrwbdec_mips.h
index ec46f95..a9f66fe 100644
--- a/libavcodec/mips/amrwbdec_mips.h
+++ b/libavcodec/mips/amrwbdec_mips.h
@@ -54,9 +54,11 @@
#include "config.h"
#if HAVE_MIPSFPU && HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
void ff_hb_fir_filter_mips(float *out, const float fir_coef[],
float mem[], const float *in);
#define hb_fir_filter ff_hb_fir_filter_mips
#endif
+#endif
#endif /* AVCODEC_MIPS_AMRWBDEC_MIPS_H */
diff --git a/libavcodec/mips/celp_filters_mips.c b/libavcodec/mips/celp_filters_mips.c
index 88ac458..926f1cb 100644
--- a/libavcodec/mips/celp_filters_mips.c
+++ b/libavcodec/mips/celp_filters_mips.c
@@ -58,6 +58,7 @@
#include "libavutil/mips/asmdefs.h"
#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
static void ff_celp_lp_synthesis_filterf_mips(float *out,
const float *filter_coeffs,
const float* in, int buffer_length,
@@ -278,12 +279,15 @@ static void ff_celp_lp_zero_synthesis_filterf_mips(float *out,
out[n] = sum_out1;
}
}
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_INLINE_ASM */
void ff_celp_filter_init_mips(CELPFContext *c)
{
#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
c->celp_lp_synthesis_filterf = ff_celp_lp_synthesis_filterf_mips;
c->celp_lp_zero_synthesis_filterf = ff_celp_lp_zero_synthesis_filterf_mips;
#endif
+#endif
}
diff --git a/libavcodec/mips/celp_math_mips.c b/libavcodec/mips/celp_math_mips.c
index 008dd80..ce711bd 100644
--- a/libavcodec/mips/celp_math_mips.c
+++ b/libavcodec/mips/celp_math_mips.c
@@ -56,6 +56,7 @@
#include "libavutil/mips/asmdefs.h"
#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
static float ff_dot_productf_mips(const float* a, const float* b,
int length)
{
@@ -80,11 +81,14 @@ static float ff_dot_productf_mips(const float* a, const float* b,
);
return sum;
}
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_INLINE_ASM */
void ff_celp_math_init_mips(CELPMContext *c)
{
#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
c->dot_productf = ff_dot_productf_mips;
#endif
+#endif
}
diff --git a/libavcodec/mips/compute_antialias_float.h b/libavcodec/mips/compute_antialias_float.h
index f6cf465..e2b4f29 100644
--- a/libavcodec/mips/compute_antialias_float.h
+++ b/libavcodec/mips/compute_antialias_float.h
@@ -58,6 +58,7 @@
#include "libavutil/mips/asmdefs.h"
#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
static void compute_antialias_mips_float(MPADecodeContext *s,
GranuleDef *g)
{
@@ -179,6 +180,7 @@ static void compute_antialias_mips_float(MPADecodeContext *s,
);
}
#define compute_antialias compute_antialias_mips_float
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_INLINE_ASM */
#endif /* AVCODEC_MIPS_COMPUTE_ANTIALIAS_FLOAT_H */
diff --git a/libavcodec/mips/fft_mips.c b/libavcodec/mips/fft_mips.c
index cf008c6..3cb1a4c 100644
--- a/libavcodec/mips/fft_mips.c
+++ b/libavcodec/mips/fft_mips.c
@@ -57,6 +57,7 @@
*/
#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
static void ff_fft_calc_mips(FFTContext *s, FFTComplex *z)
{
int nbits, i, n, num_transforms, offset, step;
@@ -494,6 +495,7 @@ static void ff_imdct_calc_mips(FFTContext *s, FFTSample *output, const FFTSample
output[n-k-4] = output[n2+k+3];
}
}
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_INLINE_ASM */
av_cold void ff_fft_init_mips(FFTContext *s)
@@ -504,10 +506,12 @@ av_cold void ff_fft_init_mips(FFTContext *s)
ff_init_ff_cos_tabs(16);
#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
s->fft_calc = ff_fft_calc_mips;
#if CONFIG_MDCT
s->imdct_calc = ff_imdct_calc_mips;
s->imdct_half = ff_imdct_half_mips;
#endif
#endif
+#endif
}
diff --git a/libavcodec/mips/iirfilter_mips.c b/libavcodec/mips/iirfilter_mips.c
index a5646cd..87db9ff 100644
--- a/libavcodec/mips/iirfilter_mips.c
+++ b/libavcodec/mips/iirfilter_mips.c
@@ -55,6 +55,7 @@
#include "libavcodec/iirfilter.h"
#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
typedef struct FFIIRFilterCoeffs {
int order;
float gain;
@@ -195,10 +196,13 @@ static void ff_iir_filter_flt_mips(const struct FFIIRFilterCoeffs *c,
}
}
}
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_INLINE_ASM */
void ff_iir_filter_init_mips(FFIIRFilterContext *f) {
#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
f->filter_flt = ff_iir_filter_flt_mips;
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_INLINE_ASM */
}
diff --git a/libavcodec/mips/lsp_mips.h b/libavcodec/mips/lsp_mips.h
index 1e899bc..6219c5a 100644
--- a/libavcodec/mips/lsp_mips.h
+++ b/libavcodec/mips/lsp_mips.h
@@ -55,6 +55,7 @@
#define AVCODEC_MIPS_LSP_MIPS_H
#if HAVE_MIPSFPU && HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
#include "libavutil/mips/asmdefs.h"
static av_always_inline void ff_lsp2polyf_mips(const double *lsp, double *f, int lp_half_order)
@@ -107,5 +108,6 @@ static av_always_inline void ff_lsp2polyf_mips(const double *lsp, double *f, int
}
}
#define ff_lsp2polyf ff_lsp2polyf_mips
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_MIPSFPU && HAVE_INLINE_ASM */
#endif /* AVCODEC_MIPS_LSP_MIPS_H */
diff --git a/libavcodec/mips/mpegaudiodsp_mips_fixed.c b/libavcodec/mips/mpegaudiodsp_mips_fixed.c
index 92d260b..ed8c890 100644
--- a/libavcodec/mips/mpegaudiodsp_mips_fixed.c
+++ b/libavcodec/mips/mpegaudiodsp_mips_fixed.c
@@ -57,6 +57,9 @@
#include "libavutil/mips/asmdefs.h"
#include "libavcodec/mpegaudiodsp.h"
+#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
+
static void ff_mpadsp_apply_window_mips_fixed(int32_t *synth_buf, int32_t *window,
int *dither_state, int16_t *samples, int incr)
{
@@ -901,8 +904,15 @@ static void ff_imdct36_blocks_mips_fixed(int *out, int *buf, int *in,
}
}
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
+#endif /* HAVE_INLINE_ASM */
+
void ff_mpadsp_init_mipsdsp(MPADSPContext *s)
{
+#if HAVE_INLINE_ASM
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
s->apply_window_fixed = ff_mpadsp_apply_window_mips_fixed;
s->imdct36_blocks_fixed = ff_imdct36_blocks_mips_fixed;
+#endif
+#endif
}
diff --git a/libavcodec/mips/mpegaudiodsp_mips_float.c b/libavcodec/mips/mpegaudiodsp_mips_float.c
index bd36894..270838e 100644
--- a/libavcodec/mips/mpegaudiodsp_mips_float.c
+++ b/libavcodec/mips/mpegaudiodsp_mips_float.c
@@ -58,6 +58,9 @@
#include "libavutil/mips/asmdefs.h"
#include "libavcodec/mpegaudiodsp.h"
+#if HAVE_INLINE_ASM && HAVE_MIPSFPU
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
+
static void ff_mpadsp_apply_window_mips_float(float *synth_buf, float *window,
int *dither_state, float *samples, int incr)
{
@@ -1243,9 +1246,16 @@ static void ff_imdct36_blocks_mips_float(float *out, float *buf, float *in,
}
}
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
+#endif /* HAVE_INLINE_ASM && HAVE_MIPSFPU */
+
void ff_mpadsp_init_mipsfpu(MPADSPContext *s)
{
+#if HAVE_INLINE_ASM && HAVE_MIPSFPU
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
s->apply_window_float = ff_mpadsp_apply_window_mips_float;
s->imdct36_blocks_float = ff_imdct36_blocks_mips_float;
s->dct32_float = ff_dct32_mips_float;
+#endif
+#endif
}
diff --git a/libavcodec/mips/sbrdsp_mips.c b/libavcodec/mips/sbrdsp_mips.c
index c203095..1b0a106 100644
--- a/libavcodec/mips/sbrdsp_mips.c
+++ b/libavcodec/mips/sbrdsp_mips.c
@@ -166,6 +166,7 @@ static void sbr_qmf_post_shuffle_mips(float W[32][2], const float *z)
}
#if HAVE_MIPSFPU
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
static void sbr_sum64x5_mips(float *z)
{
int k;
@@ -882,6 +883,7 @@ static void sbr_hf_apply_noise_3_mips(float (*Y)[2], const float *s_m,
phi_sign = -phi_sign;
}
}
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_MIPSFPU */
#endif /* HAVE_INLINE_ASM */
@@ -891,6 +893,7 @@ void ff_sbrdsp_init_mips(SBRDSPContext *s)
s->qmf_pre_shuffle = sbr_qmf_pre_shuffle_mips;
s->qmf_post_shuffle = sbr_qmf_post_shuffle_mips;
#if HAVE_MIPSFPU
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
s->sum64x5 = sbr_sum64x5_mips;
s->sum_square = sbr_sum_square_mips;
s->qmf_deint_bfly = sbr_qmf_deint_bfly_mips;
@@ -902,6 +905,7 @@ void ff_sbrdsp_init_mips(SBRDSPContext *s)
s->hf_apply_noise[1] = sbr_hf_apply_noise_1_mips;
s->hf_apply_noise[2] = sbr_hf_apply_noise_2_mips;
s->hf_apply_noise[3] = sbr_hf_apply_noise_3_mips;
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_MIPSFPU */
#endif /* HAVE_INLINE_ASM */
}
diff --git a/libavutil/mips/float_dsp_mips.c b/libavutil/mips/float_dsp_mips.c
index b3a812c..0943d6f 100644
--- a/libavutil/mips/float_dsp_mips.c
+++ b/libavutil/mips/float_dsp_mips.c
@@ -56,6 +56,7 @@
#include "libavutil/mips/asmdefs.h"
#if HAVE_INLINE_ASM && HAVE_MIPSFPU
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
static void vector_fmul_mips(float *dst, const float *src0, const float *src1,
int len)
{
@@ -339,14 +340,17 @@ static void vector_fmul_reverse_mips(float *dst, const float *src0, const float
);
}
}
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_INLINE_ASM && HAVE_MIPSFPU */
void ff_float_dsp_init_mips(AVFloatDSPContext *fdsp) {
#if HAVE_INLINE_ASM && HAVE_MIPSFPU
+#if !HAVE_MIPS32R6 && !HAVE_MIPS64R6
fdsp->vector_fmul = vector_fmul_mips;
fdsp->vector_fmul_scalar = vector_fmul_scalar_mips;
fdsp->vector_fmul_window = vector_fmul_window_mips;
fdsp->butterflies_float = butterflies_float_mips;
fdsp->vector_fmul_reverse = vector_fmul_reverse_mips;
+#endif /* !HAVE_MIPS32R6 && !HAVE_MIPS64R6 */
#endif /* HAVE_INLINE_ASM && HAVE_MIPSFPU */
}
--
1.9.1
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