[FFmpeg-devel] [PATCHv2 0/10] RISC-V V floating point DSP

Rémi Denis-Courmont remi at remlab.net
Sun Sep 4 16:54:34 EEST 2022


The following changes since commit b6e8fc1c201d58672639134a737137e1ba7b55fe:

  avcodec/speexdec: improve support for speex in non-ogg (2022-09-04 11:31:57 +0200)

are waiting thorough bashing at your express convenience up to:

  riscv: float vector dot product with RVV (2022-09-04 16:45:38 +0300)

Changes since v1:

- Removed stray define.
- Fixed mismatch between byte and element size in mul-scalar.
- Added fmul, fac, dmul, dmac, fmul-add, fmul-reverse, fmul-window.
- Added float butterfly and dot product.

All operations are unrolled to the maximum group size (8), with the
exception of overlap/add. The later seems to require a minimum of 6
vectors (maybe 5 by extremely careful ordering), so the group size is
only 4.

The pointer arithmetic could be slightly optimised with SH2ADD and
SH3ADD instructions from the Zvba extension. This would require more
conditional code, or requiring support for Zvba for probably neglible
performance gains though.

----------------------------------------------------------------
Rémi Denis-Courmont (10):
      riscv: add CPU flags for the RISC-V Vector extension
      riscv: initial common header for assembler macros
      riscv: float vector-scalar multiplication with RVV
      riscv: float vector-vector multiplication with RVV
      riscv: float vector multiply-accumulate with RVV
      riscv: float vector multiplication-addition with RVV
      riscv: float vector sum-and-difference with RVV
      riscv: float reversed vector multiplication with RVV
      riscv: float vector windowed overlap/add with RVV
      riscv: float vector dot product with RVV

 libavutil/cpu.c                  |  14 +++
 libavutil/cpu.h                  |   6 +
 libavutil/cpu_internal.h         |   1 +
 libavutil/float_dsp.c            |   2 +
 libavutil/float_dsp.h            |   1 +
 libavutil/riscv/Makefile         |   3 +
 libavutil/riscv/asm.S            |  33 +++++
 libavutil/riscv/cpu.c            |  57 +++++++++
 libavutil/riscv/float_dsp_init.c |  67 ++++++++++
 libavutil/riscv/float_dsp_rvv.S  | 255 +++++++++++++++++++++++++++++++++++++++
 10 files changed, 439 insertions(+)
 create mode 100644 libavutil/riscv/Makefile
 create mode 100644 libavutil/riscv/asm.S
 create mode 100644 libavutil/riscv/cpu.c
 create mode 100644 libavutil/riscv/float_dsp_init.c
 create mode 100644 libavutil/riscv/float_dsp_rvv.S

-- 
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http://www.remlab.net/





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