[FFmpeg-devel] [PATCH 4/7] avutil/riscv/asm: add stack pushing helpers

Rémi Denis-Courmont remi at remlab.net
Tue Aug 13 18:51:58 EEST 2024



Le 13 août 2024 17:03:33 GMT+03:00, "J. Dekker" <jdek at itanimul.li> a écrit :
>From: Niklas Haas <git at haasn.dev>
>
>Instead of duplicating these common macros in every file, add them to
>the shared utility file. Also add a base case for sanity.

Is `#error` a standard directive of C11?

>---
> libavcodec/riscv/h264addpx_rvv.S | 10 ----------
> libavcodec/riscv/h264idct_rvv.S  | 10 ----------
> libavcodec/riscv/startcode_rvb.S | 10 ----------
> libavutil/riscv/asm.S            | 34 ++++++++++++++++++++++++++++++++
> 4 files changed, 34 insertions(+), 30 deletions(-)
>
>diff --git a/libavcodec/riscv/h264addpx_rvv.S b/libavcodec/riscv/h264addpx_rvv.S
>index 82739881d9..cf3b742294 100644
>--- a/libavcodec/riscv/h264addpx_rvv.S
>+++ b/libavcodec/riscv/h264addpx_rvv.S
>@@ -26,16 +26,6 @@
> 
> #include "libavutil/riscv/asm.S"
> 
>-        .macro  sx rd, addr
>-#if (__riscv_xlen == 32)
>-        sw      \rd, \addr
>-#elif (__riscv_xlen == 64)
>-        sd      \rd, \addr
>-#else
>-        sq      \rd, \addr
>-#endif
>-        .endm
>-
> func ff_h264_add_pixels4_8_rvv, zve32x
>         lpad    0
>         vsetivli        zero, 4, e8, mf4, ta, ma
>diff --git a/libavcodec/riscv/h264idct_rvv.S b/libavcodec/riscv/h264idct_rvv.S
>index d2f77a5b47..076935a5d5 100644
>--- a/libavcodec/riscv/h264idct_rvv.S
>+++ b/libavcodec/riscv/h264idct_rvv.S
>@@ -29,16 +29,6 @@
> 
> #include "libavutil/riscv/asm.S"
> 
>-        .macro  sx rd, addr
>-#if (__riscv_xlen == 32)
>-        sw      \rd, \addr
>-#elif (__riscv_xlen == 64)
>-        sd      \rd, \addr
>-#else
>-        sq      \rd, \addr
>-#endif
>-        .endm
>-
>         .variant_cc ff_h264_idct4_rvv
> func ff_h264_idct4_rvv, zve32x
>         vsra.vi v5, v1, 1
>diff --git a/libavcodec/riscv/startcode_rvb.S b/libavcodec/riscv/startcode_rvb.S
>index eec92d3340..c131ebdf59 100644
>--- a/libavcodec/riscv/startcode_rvb.S
>+++ b/libavcodec/riscv/startcode_rvb.S
>@@ -26,16 +26,6 @@
> 
> #include "libavutil/riscv/asm.S"
> 
>-        .macro  lx rd, addr
>-#if (__riscv_xlen == 32)
>-        lw      \rd, \addr
>-#elif (__riscv_xlen == 64)
>-        ld      \rd, \addr
>-#else
>-        lq      \rd, \addr
>-#endif
>-        .endm
>-
> func ff_startcode_find_candidate_rvb, zbb
>         lpad    0
>         add     a1, a0, a1
>diff --git a/libavutil/riscv/asm.S b/libavutil/riscv/asm.S
>index ec68a042d1..175f2a8672 100644
>--- a/libavutil/riscv/asm.S
>+++ b/libavutil/riscv/asm.S
>@@ -237,3 +237,37 @@
>         .macro  vntypei rd, rs, n=1
>         vwtypei \rd, \rs, -(\n)
>         .endm
>+
>+        /**
>+         * Write an XLEN-sized register to an address.
>+         * @param rs source register
>+         * @param addr address to write to
>+         */
>+        .macro  sx rs, addr
>+#if (__riscv_xlen == 32)
>+        sw      \rs, \addr
>+#elif (__riscv_xlen == 64)
>+        sd      \rs, \addr
>+#elif (__riscv_xlen == 128)
>+        sq      \rs, \addr
>+#else
>+#error Unhandled value of XLEN
>+#endif
>+        .endm
>+
>+        /**
>+         * Read an XLEN-sized register from an address.
>+         * @param[out] rd destination register
>+         * @param addr address to read from
>+         */
>+        .macro  lx rd, addr
>+#if (__riscv_xlen == 32)
>+        lw      \rd, \addr
>+#elif (__riscv_xlen == 64)
>+        ld      \rd, \addr
>+#elif (__riscv_xlen == 128)
>+        lq      \rd, \addr
>+#else
>+#error Unhandled value of XLEN
>+#endif
>+        .endm


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