[FFmpeg-devel] [PATCH v2 1/6] Update R-V V vvc_mc vset to support more lengths

[flow gg]

Thank you, this approach can indeed address similar if else scenarios.

vsetvlstatic \w, \vlen, e8, mf8, mf4, mf2, m1, m2, m4
vsetvlstatic \w, \vlen, e16, mf4, mf2, m1, m2, m4, m8
vsetvlstatic \w, \vlen, e32, mf2, m1, m2, m4, m8, m8

I plan to submit it after this patch set gets merged.

Nuo Mi <nuomi2021 at gmail.com> 于2024年12月10日周二 21:52写道：

> Hi Yuechi,
> The performance is good.
>
> There are many similar .if blocks in vsetvlstatic8, vsetvlstatic16, and
> vsetvlstatic32.
> Could we define an intermediate macro, vsetvlstatic, and use it to
> implement the above macros?
> like:
>  .macro vsetvlstatic8 w, vlen
>             vsetvlstatic 8, w, vlen, mf8, mf4, mf2, m1, m2, m3, m4
> .endm
>
> This can be addressed with another patch set.
>
> On Sun, Dec 1, 2024 at 1:11 PM <uk7b-at-foxmail.com at ffmpeg.org> wrote:
>
> > From: sunyuechi <sunyuechi at iscas.ac.cn>
> >
> > ---
> >  libavcodec/riscv/vvc/vvc_mc_rvv.S | 46 +++++++++++++++----------------
> >  1 file changed, 23 insertions(+), 23 deletions(-)
> >
> > diff --git a/libavcodec/riscv/vvc/vvc_mc_rvv.S
> > b/libavcodec/riscv/vvc/vvc_mc_rvv.S
> > index 45f4750f82..18532616d9 100644
> > --- a/libavcodec/riscv/vvc/vvc_mc_rvv.S
> > +++ b/libavcodec/riscv/vvc/vvc_mc_rvv.S
> > @@ -23,25 +23,25 @@
> >  .macro vsetvlstatic8 w, vlen
> >          .if \w == 2 && \vlen == 128
> >                  vsetivli        zero, \w, e8, mf8, ta, ma
> > -        .elseif \w == 4 && \vlen == 128
> > +        .elseif \w <= 4 && \vlen == 128
> >                  vsetivli        zero, \w, e8, mf4, ta, ma
> > -        .elseif \w == 8 && \vlen == 128
> > +        .elseif \w <= 8 && \vlen == 128
> >                  vsetivli        zero, \w, e8, mf2, ta, ma
> > -        .elseif \w == 16 && \vlen == 128
> > +        .elseif \w <= 16 && \vlen == 128
> >                  vsetivli        zero, \w, e8, m1, ta, ma
> > -        .elseif \w == 32 && \vlen == 128
> > +        .elseif \w <= 32 && \vlen == 128
> >                  li              t0, \w
> >                  vsetvli         zero, t0, e8, m2, ta, ma
> >          .elseif \w <= 4 && \vlen == 256
> >                  vsetivli        zero, \w, e8, mf8, ta, ma
> > -        .elseif \w == 8 && \vlen == 256
> > +        .elseif \w <= 8 && \vlen == 256
> >                  vsetivli        zero, \w, e8, mf4, ta, ma
> > -        .elseif \w == 16 && \vlen == 256
> > +        .elseif \w <= 16 && \vlen == 256
> >                  vsetivli        zero, \w, e8, mf2, ta, ma
> > -        .elseif \w == 32 && \vlen == 256
> > +        .elseif \w <= 32 && \vlen == 256
> >                  li              t0, \w
> >                  vsetvli         zero, t0, e8, m1, ta, ma
> > -        .elseif \w == 64 && \vlen == 256
> > +        .elseif \w <= 64 && \vlen == 256
> >                  li              t0, \w
> >                  vsetvli         zero, t0, e8, m2, ta, ma
> >          .else
> > @@ -53,25 +53,25 @@
> >  .macro vsetvlstatic16 w, vlen
> >          .if \w == 2 && \vlen == 128
> >                  vsetivli        zero, \w, e16, mf4, ta, ma
> > -        .elseif \w == 4 && \vlen == 128
> > +        .elseif \w <= 4 && \vlen == 128
> >                  vsetivli        zero, \w, e16, mf2, ta, ma
> > -        .elseif \w == 8 && \vlen == 128
> > +        .elseif \w <= 8 && \vlen == 128
> >                  vsetivli        zero, \w, e16, m1, ta, ma
> > -        .elseif \w == 16 && \vlen == 128
> > +        .elseif \w <= 16 && \vlen == 128
> >                  vsetivli        zero, \w, e16, m2, ta, ma
> > -        .elseif \w == 32 && \vlen == 128
> > +        .elseif \w <= 32 && \vlen == 128
> >                  li              t0, \w
> >                  vsetvli         zero, t0, e16, m4, ta, ma
> >          .elseif \w <= 4 && \vlen == 256
> >                  vsetivli        zero, \w, e16, mf4, ta, ma
> > -        .elseif \w == 8 && \vlen == 256
> > +        .elseif \w <= 8 && \vlen == 256
> >                  vsetivli        zero, \w, e16, mf2, ta, ma
> > -        .elseif \w == 16 && \vlen == 256
> > +        .elseif \w <= 16 && \vlen == 256
> >                  vsetivli        zero, \w, e16, m1, ta, ma
> > -        .elseif \w == 32 && \vlen == 256
> > +        .elseif \w <= 32 && \vlen == 256
> >                  li              t0, \w
> >                  vsetvli         zero, t0, e16, m2, ta, ma
> > -        .elseif \w == 64 && \vlen == 256
> > +        .elseif \w <= 64 && \vlen == 256
> >                  li              t0, \w
> >                  vsetvli         zero, t0, e16, m4, ta, ma
> >          .else
> > @@ -83,19 +83,19 @@
> >  .macro vsetvlstatic32 w, vlen
> >          .if \w == 2
> >                  vsetivli        zero, \w, e32, mf2, ta, ma
> > -        .elseif \w == 4 && \vlen == 128
> > +        .elseif \w <= 4 && \vlen == 128
> >                  vsetivli        zero, \w, e32, m1, ta, ma
> > -        .elseif \w == 8 && \vlen == 128
> > +        .elseif \w <= 8 && \vlen == 128
> >                  vsetivli        zero, \w, e32, m2, ta, ma
> > -        .elseif \w == 16 && \vlen == 128
> > +        .elseif \w <= 16 && \vlen == 128
> >                  vsetivli        zero, \w, e32, m4, ta, ma
> > -        .elseif \w == 4 && \vlen == 256
> > +        .elseif \w <= 4 && \vlen == 256
> >                  vsetivli        zero, \w, e32, mf2, ta, ma
> > -        .elseif \w == 8 && \vlen == 256
> > +        .elseif \w <= 8 && \vlen == 256
> >                  vsetivli        zero, \w, e32, m1, ta, ma
> > -        .elseif \w == 16 && \vlen == 256
> > +        .elseif \w <= 16 && \vlen == 256
> >                  vsetivli        zero, \w, e32, m2, ta, ma
> > -        .elseif \w == 32 && \vlen == 256
> > +        .elseif \w <= 32 && \vlen == 256
> >                  li              t0, \w
> >                  vsetvli         zero, t0, e32, m4, ta, ma
> >          .else
> > --
> > 2.47.1
> >
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