[FFmpeg-devel] [PATCH] lavc/vp8dsp: fix RV32 stack alignment

Rémi Denis-Courmont remi at remlab.net
Tue Jul 23 18:49:07 EEST 2024


SP must be a multiple of 16 bytes at all times on POSIX - even in leaf
functions - so that signal handlers have a properly aligned stack.
---
 libavcodec/riscv/vp8dsp_rvv.S | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/libavcodec/riscv/vp8dsp_rvv.S b/libavcodec/riscv/vp8dsp_rvv.S
index e5d5a80bf8..f3b0af3116 100644
--- a/libavcodec/riscv/vp8dsp_rvv.S
+++ b/libavcodec/riscv/vp8dsp_rvv.S
@@ -469,14 +469,14 @@ endfunc
 func ff_put_vp8_epel\len\()_h\hsize\()v\vsize\()_rvv, zve32x
         lpad    0
 #if __riscv_xlen == 64
-        addi            sp, sp, -48
+        addi    sp, sp, -48
         .irp n,0,1,2,3,4,5
-        sd              s\n, \n\()<<3(sp)
+        sd      s\n, (\n * 8)(sp)
         .endr
 #else
-        addi            sp, sp, -24
+        addi    sp, sp, -32
         .irp n,0,1,2,3,4,5
-        sw              s\n, \n\()<<2(sp)
+        sw      s\n, (\n * 4)(sp)
         .endr
 #endif
         sub             a2, a2, a3
@@ -518,14 +518,14 @@ func ff_put_vp8_epel\len\()_h\hsize\()v\vsize\()_rvv, zve32x
 
 #if __riscv_xlen == 64
         .irp n,0,1,2,3,4,5
-        ld              s\n, \n\()<<3(sp)
+        ld      s\n, (\n * 8)(sp)
         .endr
-        addi            sp, sp, 48
+        addi    sp, sp, 48
 #else
         .irp n,0,1,2,3,4,5
-        lw              s\n, \n\()<<2(sp)
+        lw      s\n, (\n * 4)(sp)
         .endr
-        addi            sp, sp, 24
+        addi    sp, sp, 32
 #endif
 
         ret
-- 
2.45.2



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