[MPlayer-dev-eng] TOOLS/cpuinfo.c and k6_mtrr

[Diego Biurrun]

Hi!

TOOLS/cpuinfo does not detect MTRR on K6, but k6_mtrr does show up on
/proc/cpuinfo.  I did some digging around the Linux kernel sources and
found this in include/asm-i386/cpufeature.h:



/* Intel-defined CPU features, CPUID level 0x00000001, word 0 */
#define X86_FEATURE_FPU         (0*32+ 0) /* Onboard FPU */
#define X86_FEATURE_VME         (0*32+ 1) /* Virtual Mode Extensions */
#define X86_FEATURE_DE          (0*32+ 2) /* Debugging Extensions */
#define X86_FEATURE_PSE         (0*32+ 3) /* Page Size Extensions */
#define X86_FEATURE_TSC         (0*32+ 4) /* Time Stamp Counter */
#define X86_FEATURE_MSR         (0*32+ 5) /* Model-Specific Registers, RDMSR, WRMSR */
#define X86_FEATURE_PAE         (0*32+ 6) /* Physical Address Extensions */
#define X86_FEATURE_MCE         (0*32+ 7) /* Machine Check Architecture */
#define X86_FEATURE_CX8         (0*32+ 8) /* CMPXCHG8 instruction */
#define X86_FEATURE_APIC        (0*32+ 9) /* Onboard APIC */
#define X86_FEATURE_SEP         (0*32+11) /* SYSENTER/SYSEXIT */
#define X86_FEATURE_MTRR        (0*32+12) /* Memory Type Range Registers */
#define X86_FEATURE_PGE         (0*32+13) /* Page Global Enable */
#define X86_FEATURE_MCA         (0*32+14) /* Machine Check Architecture */
#define X86_FEATURE_CMOV        (0*32+15) /* CMOV instruction (FCMOVCC and FCOMI too if FPU present) */
#define X86_FEATURE_PAT         (0*32+16) /* Page Attribute Table */
#define X86_FEATURE_PSE36       (0*32+17) /* 36-bit PSEs */
#define X86_FEATURE_PN          (0*32+18) /* Processor serial number */
#define X86_FEATURE_CLFLSH      (0*32+19) /* Supports the CLFLUSH instruction */#define X86_FEATURE_DTES        (0*32+21) /* Debug Trace Store */
#define X86_FEATURE_ACPI        (0*32+22) /* ACPI via MSR */
#define X86_FEATURE_MMX         (0*32+23) /* Multimedia Extensions */
#define X86_FEATURE_FXSR        (0*32+24) /* FXSAVE and FXRSTOR instructions (fast save and restore */
                                          /* of FPU context), and CR4.OSFXSR available */
#define X86_FEATURE_XMM         (0*32+25) /* Streaming SIMD Extensions */
#define X86_FEATURE_XMM2        (0*32+26) /* Streaming SIMD Extensions-2 */
#define X86_FEATURE_SELFSNOOP   (0*32+27) /* CPU self snoop */
#define X86_FEATURE_HT          (0*32+28) /* Hyper-Threading */
#define X86_FEATURE_ACC         (0*32+29) /* Automatic clock control */
#define X86_FEATURE_IA64        (0*32+30) /* IA-64 processor */

/* AMD-defined CPU features, CPUID level 0x80000001, word 1 */
/* Don't duplicate feature flags which are redundant with Intel! */
#define X86_FEATURE_SYSCALL     (1*32+11) /* SYSCALL/SYSRET */
#define X86_FEATURE_MMXEXT      (1*32+22) /* AMD MMX extensions */
#define X86_FEATURE_LM          (1*32+29) /* Long Mode (x86-64) */
#define X86_FEATURE_3DNOWEXT    (1*32+30) /* AMD 3DNow! extensions */
#define X86_FEATURE_3DNOW       (1*32+31) /* 3DNow! */

/* Other features, Linux-defined mapping, word 3 */
/* This range is used for feature bits which conflict or are synthesized */
#define X86_FEATURE_CXMMX       (3*32+ 0) /* Cyrix MMX extensions */
#define X86_FEATURE_K6_MTRR     (3*32+ 1) /* AMD K6 nonstandard MTRRs */
#define X86_FEATURE_CYRIX_ARR   (3*32+ 2) /* Cyrix ARRs (= MTRRs) */
#define X86_FEATURE_CENTAUR_MCR (3*32+ 3) /* Centaur MCRs (= MTRRs) */



which mostly corresponds to what we have in TOOLS/cpuinfo.c:



if (max_cpuid >= 1) {
        static struct {
                int bit;
                char *desc;;
                char *description;
        } cap[] = {
                { 0,  "fpu",   "Floating-point unit on-chip" },
                { 1,  "vme",   "Virtual Mode Enhancements" },
                { 2,  "de",    "Debugging Extension" },
                { 3,  "pse",   "Page Size Extension" },
                { 4,  "tsc",   "Time Stamp Counter" },
                { 5,  "msr",   "Pentium Processor MSR" },
                { 6,  "pae",   "Physical Address Extension" },
                { 7,  "mce",   "Machine Check Exception" },
                { 8,  "cx8",   "CMPXCHG8B Instruction Supported" },
                { 9,  "apic",  "On-chip CPIC Hardware Enabled" },
                { 11, "sep",   "SYSENTER and SYSEXIT" },
                { 12, "mtrr",  "Memory Type Range Registers" },
                { 13, "pge",   "PTE Global Bit" },
                { 14, "mca",   "Machine Check Architecture" },
                { 15, "cmov",  "Conditional Move/Compare Instruction" },
                { 16, "pat",   "Page Attribute Table" },
                { 17, "pse36", "Page Size Extension 36-bit" },
                { 18, "psn",   "Processor Serial Number" },
                { 19, "cflsh", "CFLUSH instruction" },
                { 21, "ds",    "Debug Store" },
                { 22, "acpi",  "Thermal Monitor and Clock Ctrl" },
                { 23, "mmx",   "MMX Technology" },
                { 24, "fxsr",  "FXSAVE/FXRSTOR" },
                { 25, "sse",   "SSE Extensions" },
                { 26, "sse2",  "SSE2 Extensions" },
                { 27, "ss",    "Self Snoop" },
                { 29, "tm",    "Therm. Monitor" },
                { -1 }
        };
        static struct {
                int bit;
                char *desc;;
                char *description;
        } cap_amd[] = {
                { 22, "mmxext","MMX Technology (AMD Extensions)" },
                { 30, "3dnowext","3Dnow! Extensions" },
                { 31, "3dnow", "3Dnow!" },
                { -1 }
        };



However, it's not clear to me which number this

#define X86_FEATURE_K6_MTRR     (3*32+ 1) /* AMD K6 nonstandard MTRRs */

corresponds to in TOOLS/cpuinfo.c..  1?

Hints much appreciated.
Thanks

Diego