[MPlayer-users] pentium4 bench

[Michael Niedermayer]

Hi

On Sunday 25 November 2001 16:59, Nick Kurshev wrote:
[...]
> > the p4 needs more time for most things than the p3/celeron
> > for example it needs 4 cpu cycles for a shift the p3 needs 1 and for a
> > multiply it needs 14 the p3 needs 4
> > allthough the p4 can execute simple instructions faster (+,-, and, or,
> > ...) but it can only execute 3 instruction per cpu cycle at max like te
> > p3/cel. it has only 8kb cache the p3/cel has 16kb (and k7 has 64kb)
>
> Please read better manuals - L1 = 128Kb L2 = 256Kb (TBird) or 64Kb (Duron)
[...]
i was refering to the L1 data cache only, u talk about code+date
				P3/cel		P4	K6	K7
L1 data				16k 		8k	32k	64k
L1 data set associativity	4		4	2	2
L1 code				16k		NA	32k	64k
L1 code set associativity	4		8	2	2
L1 data+code			32k		NA	64k	128k
numbers are better if they are larger
for more info see http://www.sandpile.org (much better for finding these 
numbers that intel/amd several hundred page manuals imho)

Michael