[MPlayer-users] Mplayer BUG Athlon

[Zephaniah E. Hull]

On Wed, Feb 05, 2003 at 11:38:15PM +0100, Marc-Tell Volkmann wrote:
> since I have changed to a new mainboard (K7S5A) + ATHLON XP2200+ CPU I can't 
> start mplayer anymore.
> I have trouble with playing ANY video (avi,mpg,...)
> mplayer was compiled on the same Computer were it run!

Yes, with gcc told to compile for an athlon-xp, which nicely includes
SSE instructions.
> RedHat8.0
> Kernel: 2.4.20
> libc-2.2.93
> XFree86 Version 4.2.0
> gcc version 3.2
> GNU ld version 2.13.90.0.2
> GNU assembler 2.13.90.0.2
> CPU:
>         processor       : 0
>         vendor_id        : AuthenticAMD
>         cpu family       : 6
>         model              : 8
>         model name     : AMD Athlon(tm) XP 2200+
>         stepping        : 0
>         cpu MHz         : 1792.287
>         cache size      : 256 KB
>         fdiv_bug        : no
>         hlt_bug         : no
>         f00f_bug        : no
>         coma_bug        : no
>         fpu             : yes
>         fpu_exception   : yes
>         cpuid level     : 1
>         wp              : yes
>         flags       : fpu vme de pse tsc msr pae mce cx8 sep mtrr pge mca cmov
>                                 pat pse36 mmx fxsr syscall mmxext 3dnowext 
> 3dnow

No SSE support.

This is a known issue for the K7S5A, the BIOS is supposed to enable SSE,
but does not on the newer XP's.

Linux has a work around, to enable SSE when the BIOS does not, but that
check does not know about the newer family of XP's either.

Attached is a simple patch to fix it under 2.5.x, it should be trivial
to do a similar fix in 2.4.x.

Problem easily solved.

Zephaniah E. Hull.

-- 
	1024D/E65A7801 Zephaniah E. Hull <warp at babylon.d2dc.net>
	   92ED 94E4 B1E6 3624 226D  5727 4453 008B E65A 7801
	    CCs of replies from mailing lists are requested.

Why blow away at a partition when you can chip away at it?  I now
present a script I just wrote that writes random bits of, well random
bits, into random places in your favorite partition or file.  For best
(meaning most spectacular) results, use while the database or
filesystem is in active use.

Disclaimer:  This code is untested, and it may or may not trash your
filesystem and/or database.  While at least a half-assed effort has
been made to ensure that it works as designed, there is no guarantee
that its use will result in a loss of important data.  I am not liable
for the lack of either direct or incidental damages.
  -- Logan Shaw on ASR.
-------------- next part --------------
--- linux-2.5.50/arch/i386/kernel/cpu/amd.c	2002-11-27 17:36:22.000000000 -0500
+++ linux-2.5.58/arch/i386/kernel/cpu/amd.c	2003-01-22 10:44:55.000000000 -0500
@@ -151,11 +151,11 @@
 		case 6: /* An Athlon/Duron */
  
 			/* Bit 15 of Athlon specific MSR 15, needs to be 0
- 			 * to enable SSE on Palomino/Morgan CPU's.
+ 			 * to enable SSE on Palomino/Morgan/Thoroughbred CPU's.
 			 * If the BIOS didn't enable it already, enable it
 			 * here.
 			 */
-			if (c->x86_model == 6 || c->x86_model == 7) {
+			if (c->x86_model >= 6 && c->x86_model <= 8) {
 				if (!cpu_has(c, X86_FEATURE_XMM)) {
 					printk(KERN_INFO "Enabling disabled K7/SSE Support.\n");
 					rdmsr(MSR_K7_HWCR, l, h);
-------------- next part --------------
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